The xDig register class is used for reading and writing bit fields of simple digital registers within VXI cards. Access to the hardware must involve only a single access via the VXI backplane.

Whole words can be accessed by setting the length and bit attributes to zero.
The class accepts values in decimal or hex format.

All address variables are VME addresses and are thus expressed in units of bytes (8 bits).

Attributes :-

-s    VXI slot number

specifies the slot number (1-12) within the VXI crate. Manditory - no default value.

-c    channel number

specifies the hardware channel within the VXI card. Optional. By default -c 0 is assumed.
Normally channel 0 is used for the configuration and common registers positioned at the base of the card address space and channels 1 => n are used for the channel specific registers.

-a    channel base address

specifies the address offset of the channel area relative to the base address of the VXI card. This is the address offset within the card of the base of the channel 0 area. Optional. By default -a 0 is assumed.

-z    channel address size

specifies the address space allocated to each channel within the channel area of the VXI card. Optional. By default -z 256 is assumed.

-o    offset

specifies the address offset of the hardware register relative to the base of the current channel within the VXI card. Manditory - no default value.

-O    offset

specifies the address offset for READ operations of the hardware register relative to the base of the current channel within the VXI card. Optional.
By default it is assumed that the address offset of a register for WRITE and READ operations is the same. The -o attribute is taken by default to be the offset for both WRITE and READ operatation. The -O attribute (if required) specifies the READ offset and MUST be specified AFTER the -o attribute.

-w    width of VME access. Options are 8; 16; 32.

specifies the data width required for accesses to the VXI hardware register.

-p    access permission (rw, ro, wo, rc)

specifies the data access modes permitted to the VXI hardware register. Options are ro (read only); wo (write only); rw (read-write); rc (read and clear).

-l    length of bit field

specifies the length of the data field for this register in bits.
The server code permits access to VXI hardware registers at the bit level. The hardware will always be accessed using the access width specified by the -w attribute. The server however implements in software objects which may be any subfield of a hardware register. For write access to a subfield of a hardware register it is required that the hardware be readable.
The attribute value -l 0 implies that the data field for this object is the same as the hardware access width specified by the -w attribute. Optional. By default -l 0 is assumed.

-b    bit position

specifies the position of the least significant bit of the data within the hardware register. The hardware is addressed with the least significant bit having the value 0.
This attribute will normally always be used in conjunction with the -l attribute to define the length and position of a software object which is a subfield of the hardware register. Optional. By default -b 0 is assumed.

-g    negative logic

specifies the nature of the hardware register logic. By default data will be passed to and from the hardware transparently (-g 0). However the attribute -g 1 requires that data be inverted before write to the hardware and after read from the hardware.

-n    inhibit

specifies if the VXI inhibit line is to the driven when accessing the VXI hardware. By default the server will use the VXI inhibit line to prevent data processing on the VXI cards while the VXI backplane is accessed (-n 0). This attribute allows the inhibit action to be suppressed (-n 1).

-f    data format

specifies the data format to be used by READ operations. Data can be return in decimal (d) or hexadecimal (x). The default is hexadecimal.

-i    initial value

specifies the data value to be used by the INITIALISE operation. The register must also have write permission.

The absolute VME address of a register (relative to the card base address allocated by the Resource Manager) is given by (channel area base address) + (channel number * channel size) + (register offset).