The xMty register class is used for flushing (emptying) FIFO registers within Eurogam Phase I VXI cards.

It is assumed that access to the FIFO register requires 32 bit VME accesses.
It is assumed that a 16 bit register contains a bit which indicates the state (empty or not) of the FIFO.

Attributes :-

-s    VXI slot number

specifies the slot number (1-12) within the VXI crate. Manditory - no default value.

-o    offset of FIFO register

specifies the address offset of the hardware FIFO register relative to the base address of the VXI card. Manditory - no default value.

-e    offset of register containing empty status bit

specifies the address offset of the hardware status register which contains the FIFO empty status relative to the base address of the VXI card. Manditory - no default value.

-b    bit position of empty bit

specifies the position of the FIFO empty status bit within the hardware register. The hardware is addressed with the least significant bit having the value 0.

The READ operation returns the value of the FIFO empty status bit (1 = FIFO not empty).
The WRITE operation flushes the FIFO by reading it either until the FIFO empty status bit indicates that the FIFO is empty or for 512 accesses.